In the integrated circuit (IC) industry, electrical circuits are used to drive single or differential signals along telephone lines, cables, or other communication media. One such circuit is illustrated in FIG. 1. Specifically, FIG. 1 illustrates a prior art circuit 10 which is used for communicating voltage signals over great distances (e.g., up to many miles). Circuit 10 contains a first operational amplifier (op amp) 12 and a second operational amplifier (op amp) 14. The operational amplifier 12 is used to communicate a first half (e.g., positive signal) of a differential output signal and the operational amplifier 14 is used to communicate a second half (e.g., negative signal) of the differential output signal.
Operational amplifier 12 has a positive terminal that is connected to a ground power supply 20. A negative terminal of operational amplifier 12 is coupled through a resistor 24a to receive a positive input voltage 16 (VINP) for driving the circuit. In addition, the negative terminal of the operational amplifier 12 is coupled through the resistor 26a to the output 31a of the operational amplifier 12.
In a similar manner, a positive terminal of the operational amplifier 14 is coupled to a power supply (ground (GND)) 22. A negative terminal of the operational amplifier 14 is coupled through a resistor 24b to a negative input voltage (VINN) 18 which supplies an input voltage to the circuit. The negative terminal of the operational amplifier 14 is also coupled through a resistor 26b to the output 31b of the operational amplifier 14.
The output of operational amplifier 12 is connected through a resistor 28a to an output terminal 29a. The output of the operational amplifier 14 is connected through a resistor 28b to the output terminal 29b. The differential output 29a and 29b is used to communicate the two voltages provided by the circuitry of FIG. 1 to an external communication infrastructure. The external communication infrastructure will have a resistive load (RL) symbolized by resistor 30 in FIG. 1.
In the telecommunications industries, standards require that the resistive load 30 be matched to the source impedance of the circuit 10 in FIG. 1. This matching of the source impedance of the line driver circuit with the load resistance (RL) 30 reduces signal reflection and generally enhances performance of the communication system. In order to obtain the impedance matching, the resistors 28a and 28b are both set to half the line resistance (RL) whereby resistors 28a and 28b each have a resistance of RL/2. Note that the operational amplifiers 12 and 14 contribute no significant resistance to the source resistance of the line driver circuit in FIG. 1.
The problem with the impedance settings in FIG. 1 is that the voltages driven on the nodes 31a and 31b respectively by the op amps 12 and 14 must be twice the voltage which needs to be present for communication at the output terminals 29a and 29b. For example, if a differential signal of 10 volts needs to be provided across the load 30 where a voltage at terminal 29a is to be +5.0 volts and a voltage at terminal 29b is to be -5.0 volts, then a voltage at node 31a must be driven to 10.0 volts and a voltage at node 31b must be driven to -10.0 volts. The resistors 28a, 30, and 28b function as voltage dividers whereby the operational amplifiers 12 and 14 must drive greater voltages onto nodes 31a and 31b to get proper output voltage magnitudes of +5.0 volts and -5.0 volts at the line driver outputs 29a and 29b. Generically stated, in order to get a voltage X provided to the load (RL) 30, the operational amplifiers 12 and 14 must provide a voltage of two times X at points 31a and 31b. Therefore, the amount of power consumed by the circuit 10 of FIG. 1 is excessive.
Therefore, a need exists in the integrated circuit and telecommunications industries for a line driver that can drive adequate voltage levels at the line driver output terminals 29a and 29b without consuming a significant amount of power in the line driver op amp circuitry. In addition, it would be beneficial if the low power line driver could easily lie designed and manufactured using standard process technology. Addition of complex architectures to reduce power consumption could be problematic, as the design becomes more difficult and manufacturing less reliable, whereby complexity should be avoided. Also, a low power line driver would be more likely to be useful if it consumed a minimal amount of silicon surface area on an integrated circuit (IC) die.